简单的列一下十月的JSSC中的部分内容：

A 15-Gb/s 0.5-mW/Gbps Two-Tap DFE Receiver With Far-End Crosstalk Cancellation

关于开关电容DFE和具体的cross-talk cancel的方法

A 2.4 GHz Fractional-N Frequency Synthesizer With High-OSR ΔΣ Modulator and Nested PLL

在Fractional-N PLL中多级的divider以提高ΔΣ Modulator的过采样率，同时环路中增加PLL以减小噪声混叠

A Single-Channel, 1.25-GS/s, 6-bit, 6.08-mW Asynchronous Successive-Approximation ADC With Improved Feedback Delay in 40-nm CMOS

采用异步多比特量化的结构，以消除数字逻辑的延时，提高SAR ADC的速度

A 10-bit Resistor-Floating-Resistor-String DAC (RFR-DAC) for High Color-Depth LCD Driver ICs

关于resistor dac 和 floating resistor string dac 结合的结构

Design, Modeling, and Test of a Programmable Adaptive Phase-Shifting PLL for Enhancing Clock Data Compensation

关于adaptive phase shift PLL的设计，电源噪声和时钟相移问题

A 1.4-µW 24.9-ppm/°C Current Reference With Process-Insensitive Temperature Compensation in 0.18-µm CMOS

利用mos管亚阈值特性构建电阻温度特性的补偿电压，实现工艺不敏感的参考电流

A Portable 2-Transistor Picowatt Temperature-Compensated Voltage Reference Operating at 0.5 V

由不同阈值的MOS管实现的参考电压，超低功耗的设计