JSSC 2016-02 笔记

简单列一下二月份 JSSC 的几篇论文

A 2.02–5.16 fJ/Conversion Step 10 Bit Hybrid Coarse-Fine SAR ADC With Time-Domain Quantizer in 90 nm CMOS

7-bit coarse SAR ADC + 3.5bit TDC 的方法,考虑功耗电压问题,vcm-based switching 和 double-bootstrapped S/H 的结构

A Compact First-Order ΣΔ Modulator for Analog High-Volume Testing of Complex System-on-Chips in a 14 nm Tri-Gate Digital CMOS Process

Inverter based 结构, 加入 dither 的方法和考虑共模抑制问题而加入的 time-multiplexed pseudo-differential operation

Variation-Tolerant Quick-Start-Up CMOS Crystal Oscillator With Chirp Injection and Negative Resistance Booster


A Successive-Approximation Switched-Capacitor DC–DC Converter With Resolution of VIN/2N for a Wide Range of Input and Output Voltages

采用级联 1/2 SC converter 的结构 + SAR logic

版权声明: 本站文章版权所有,转载须以超链接形式标明文章原始出处和版权信息。


电子邮件地址不会被公开。 必填项已用*标注