JSSC 2011-10 笔记

10月份的JSSC, 简单列一下觉得可以了解的内容:

Ultrahigh-Speed Low-Power DACs Using InP HBTs for Beyond-100-Gb/s/ch Optical Transmission Systems

在电路设计上,可以看看里面R-2R的current-steering DAC和 timing alignment的结构

Digitally Assisted IIP2 Calibration for CMOS Direct-Conversion Receivers


An Ultra-Low Voltage, Low-Noise, High Linearity 900-MHz Receiver With Digitally Calibrated In-Band Feed-Forward Interferer Cancellation in 65-nm CMOS

关于in-band feed-forward interferer cancellation 方法,以在低压下同时获得高的线性和低噪声

An Ultra-Wideband Impulse-Radio Transceiver Chipset Using Synchronized-OOK Modulation


A Fast Phase Tracking ADPLL for Video Pixel Clock Generation in 65 nm CMOS Technology


A Miniature 2 mW 4 bit 1.2 GS/s Delay-Line-Based ADC in 65 nm CMOS

关于delay-line-based ADC的结构,具体的量化噪声,jitter和mismatch的分析

A 0.6-V 82-dB 28.6- W Continuous-Time Audio Delta-Sigma Modulator

低压的CT-delta-sigma ADC 的设计, 4阶的前馈结构

Design and Analysis of a Self-Oscillating Class D Audio Amplifier Employing a Hysteretic Comparator

关于3阶结构的 class-D  的 Audio 放大器的设计

A Wide-Load-Range Constant-Charge-Auto-Hopping Control Single-Inductor-Dual-Output Boost Regulator With Minimized Cross-Regulation

关于 boost 变换器的设计,包括 constant-charge-auto-hopping (CCAH) 的控制方法等

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